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QL3025-2PQ208I Datasheet |  | | Description: | 25,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | | Manufacturer: | QULOG | | Temp. range: | Min: -40°C | Max: 85°C | | Package: | PQFP | | Pins: | 208 | | Datasheet: | QL3025-2PQ208I.PDF (582Kb) |
Related datasheets for QL3025-2PQ208I:Lower in the list you can see the relative results of searching, which resembling the inquiring. If there is no necessary name in the results of searching for QL3025-2PQ208I – look at the relative results.
| # | Component part name | Component Description | Manufacturer | PDF size | | 1. | QL3025-2PQ208C | 25,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | 582K | | 2. | QL3025-2PQ208I | 25,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | 582K | | 3. | QL3025-2PQ208M | 25,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | QULOG | 239K |
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QL3025-2PQ208I.PDF
QL3025-2PQ208I Datasheet25,000 usable PLD gate pASIC3 FPGA combining high performance and high density.
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