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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 1. | 74HC107D | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | SOT108 | - | - | - | 53K |
| 2. | 74HC107DB | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | SOT337 | - | - | - | 53K |
| 3. | 74HC107N | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | SOT27 | - | - | - | 53K |
| 4. | 74HC107PW | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | SOT402 | - | - | - | 53K |
| 5. | 74HC107PW | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | SOT402 | - | - | - | 53K |
| 6. | 74HC107U | Dual JK flip-flop with reset; negative-edge trigger | PHLPS | - | - | - | - | 53K |
| 7. | CD74HC107E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | N | 14 | -55°C | 125°C | 56K |
| 8. | CD74HC107M | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 56K |
| 9. | CD74HC107M96 | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 56K |
| 10. | M74HC107 | DUAL J-K FLIP FLOP WITH CLEAR | STM | - | - | - | - | 248K |
| 11. | MC74HC107D | Dual J-K flip-flop with reset | MOT | SOIC | 14 | -55°C | 125°C | 171K |
| 12. | MC74HC107D | Dual J-K flip-flop with reset | MOT | P-SOIC | 14 | -55°C | 125°C | 171K |
| 13. | MC74HC107N | Dual J-K flip-flop with reset | MOT | PDIP | 14 | -55°C | 125°C | 171K |
| 14. | MC74HC107N | Dual J-K flip-flop with reset | MOT | P-DIP | 14 | -55°C | 125°C | 171K |
