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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 361. | CD74HC08E | HIGH SPEED CMOS LOGIC QUAD 2-INPUT AND GATES | TI | N | 14 | -55°C | 125°C | 33K |
| 362. | CD74HC08M | HIGH SPEED CMOS LOGIC QUAD 2-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 33K |
| 363. | CD74HC08M96 | HIGH SPEED CMOS LOGIC QUAD 2-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 33K |
| 364. | CD74HC11E | HIGH SPEED CMOS LOGIC TRIPLE 3-INPUT AND GATES | TI | N | 14 | -55°C | 125°C | 33K |
| 365. | CD74HC11M | HIGH SPEED CMOS LOGIC TRIPLE 3-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 33K |
| 366. | CD74HC11M96 | HIGH SPEED CMOS LOGIC TRIPLE 3-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 33K |
| 367. | CD74HC11M96 | HIGH SPEED CMOS LOGIC TRIPLE 3-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 33K |
| 368. | CD74HC21E | HIGH SPEED CMOS LOGIC DUAL 4-INPUT AND GATES | TI | N | 14 | -55°C | 125°C | 42K |
| 369. | CD74HC21E | HIGH SPEED CMOS LOGIC DUAL 4-INPUT AND GATES | TI | N | 14 | -55°C | 125°C | 42K |
| 370. | CD74HC21M | HIGH SPEED CMOS LOGIC DUAL 4-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 42K |
| 371. | CD74HC21M | HIGH SPEED CMOS LOGIC DUAL 4-INPUT AND GATES | TI | D | 14 | -55°C | 125°C | 42K |
| 372. | CD74HCT109E | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -55°C | 125°C | 58K |
| 373. | CD74HCT109E | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -55°C | 125°C | 58K |
| 374. | CD74HCT109M | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -55°C | 125°C | 58K |
| 375. | CD74HCT109M96 | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -55°C | 125°C | 58K |
| 376. | CD74HCT112E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -55°C | 125°C | 55K |
| 377. | CD74HCT112E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -55°C | 125°C | 55K |
| 378. | CD74HCT73E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | N | 14 | -55°C | 125°C | 57K |
| 379. | CD74HCT73E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | N | 14 | -55°C | 125°C | 57K |
| 380. | CD74HCT73E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | N | 14 | -55°C | 125°C | 57K |
| 381. | CD74HCT73M | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 57K |
| 382. | CD74HCT73M | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 57K |
