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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 781. | MC100LVEL16D | Differential Receiver | ON | SOIC | 8 | - | - | 58K |
| 782. | MC100LVEL16DR2 | Differential Receiver | ON | SOIC | 8 | - | - | 58K |
| 783. | MC100LVEL17DW | Low-Voltage Quad Differential Line Receiver | ON | SOIC | 20 | - | - | 108K |
| 784. | MC100LVEL17DWR2 | Low-Voltage Quad Differential Line Receiver | ON | SOIC | 20 | - | - | 108K |
| 785. | MC100LVEL37DW | Low Voltage 1:4 Divide by 1/Divide by 2 ECL/PECL Clock Fanout Buffer | ON | SOIC | 20 | - | - | 72K |
| 786. | MC100LVEL37DWR2 | Low Voltage 1:4 Divide by 1/Divide by 2 ECL/PECL Clock Fanout Buffer | ON | SOIC | 20 | - | - | 72K |
| 787. | MC100LVEL38DW | Low Voltage Divide by 2, Divide by 4/6 Clock Generator Chip | ON | SOIC | 20 | - | - | 128K |
| 788. | MC100LVEL38DWR2 | Low Voltage Divide by 2, Divide by 4/6 Clock Generator Chip | ON | SOIC | 20 | - | - | 128K |
| 789. | MC100LVEL39DW | -2/4, -4/6 Clock Generation Chip | ON | SOIC | 20 | - | - | 127K |
| 790. | MC100LVEL39DWR2 | -2/4, -4/6 Clock Generation Chip | ON | SOIC | 20 | - | - | 127K |
| 791. | MC100LVEL40DW | Phase-Frequency Detector | ON | SOIC | 20 | - | - | 72K |
| 792. | MC100LVEL40DWR2 | Phase-Frequency Detector | ON | SOIC | 20 | - | - | 72K |
| 793. | MC100LVEL90DW | Triple ECL to PECL Translator | ON | SOIC | 20 | - | - | 114K |
| 794. | MC100LVEL90DWR2 | Triple ECL to PECL Translator | ON | SOIC | 20 | - | - | 114K |
| 795. | MC100LVEL91DW | Triple PECL to ECL Translator | ON | SOIC | 20 | - | - | 80K |
| 796. | MC100LVEL91DWR2 | Triple PECL to ECL Translator | ON | SOIC | 20 | - | - | 80K |
| 797. | MC100LVEL92DW | Triple PECL to LVPECL Translator | ON | SOIC | 20 | - | - | 71K |
| 798. | MC100LVEL92DWR2 | Triple PECL to LVPECL Translator | ON | SOIC | 20 | - | - | 71K |
| 799. | MC100LVELT22D | Dual Differential PECL/TTL Translator | ON | SOIC | 8 | - | - | 57K |
| 800. | MC100LVELT22DR2 | Dual Differential PECL/TTL Translator | ON | SOIC | 8 | - | - | 57K |
