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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 481. | CD74AC109E | DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -40°C | 85°C | 226K |
| 482. | CD74AC109M96 | DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 483. | CD74AC112E | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -40°C | 85°C | 226K |
| 484. | CD74AC112M | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 485. | CD74AC112M96 | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 486. | CD74ACT109E | DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -40°C | 85°C | 226K |
| 487. | CD74ACT109E | DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -40°C | 85°C | 226K |
| 488. | CD74ACT109M | DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 489. | CD74ACT109M96 | DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 490. | CD74ACT109M96 | DUAL POSITIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 491. | CD74ACT112M | DUAL NEGATIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 492. | CD74ACT112M | DUAL NEGATIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 493. | CD74ACT112M | DUAL NEGATIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 494. | CD74ACT112M96 | DUAL NEGATIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -40°C | 85°C | 226K |
| 495. | CD74HC107E | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | N | 14 | -55°C | 125°C | 56K |
| 496. | CD74HC107M | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 56K |
| 497. | CD74HC107M96 | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET | TI | D | 14 | -55°C | 125°C | 56K |
| 498. | CD74HC109E | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | N | 16 | -55°C | 125°C | 58K |
| 499. | CD74HC109M | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | TI | D | 16 | -55°C | 125°C | 58K |
| 500. | CD74HCT74M96 | HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED D FLIP-FLOPS WITH SET AND RESET | TI | D | 14 | -55°C | 125°C | 43K |
