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We have more Special DataSheet than other site. If, There is not a datasheet which searches, Request ! (It will updated in 12 hours.)
GetDatasheet is a free electronic engineering tool that enables you to locate product datasheets from hundreds of electronic component manufacturers worldwide.

Found: 1608      Displaying: 1301 - 1320
#
Part:
Description:
Manuf.
Package
Pins
T°min
T°max
PDF size
1301.
QL3040-0PQ208I40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
477K
1302.
QL3040-1PQ208I40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
477K
1303.
QL3040-2PQ208I40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
477K
1304.
QL3040-3PQ208I40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
477K
1305.
QL3040-3PQ208M40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-55°C
125°C
477K
1306.
QL3040-4PQ208I40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
477K
1307.
QL3040-4PQ208M40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-55°C
125°C
477K
1308.
QL3060-0PQ208C60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
0°C
70°C
573K
1309.
QL3060-0PQ208I60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
573K
1310.
QL3060-1PQ208C60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
0°C
70°C
573K
1311.
QL3060-1PQ208I60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
573K
1312.
QL3060-2PQ208C60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
0°C
70°C
573K
1313.
QL3060-2PQ208I60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
573K
1314.
QL3060-3PQ208C60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
0°C
70°C
573K
1315.
QL3060-3PQ208I60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
573K
1316.
QL3060-3PQ208M60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-55°C
125°C
573K
1317.
QL3060-4PQ208C60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
0°C
70°C
573K
1318.
QL3060-4PQ208I60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-40°C
85°C
573K
1319.
QL3060-4PQ208M60,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PQFP
208
-55°C
125°C
573K
1320.
QL5032-33APQ208I33MHz/32-bit PCI master/target with embedded programmable logic and dual port SRAM.
QULOG
PQFP
208
-40°C
85°C
542K
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