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We have more Special DataSheet than other site. If, There is not a datasheet which searches, Request ! (It will updated in 12 hours.)
GetDatasheet is a free electronic engineering tool that enables you to locate product datasheets from hundreds of electronic component manufacturers worldwide.

Found: 445      Displaying: 81 - 100
#
Part:
Description:
Manuf.
Package
Pins
T°min
T°max
PDF size
81.
IS41C44002-50J5V 4M x 4(16-MBIT) dynamic RAM with edo page mode
ISSI
SOJ
24
0°C
70°C
157K
82.
IS41C44002-50JI5V 4M x 4(16-MBIT) dynamic RAM with edo page mode
ISSI
SOJ
24
-40°C
85°C
157K
83.
IS41C44052-50J5V 4M x 4(16-MBIT) dynamic RAM with fast page mode
ISSI
SOJ
24
0°C
70°C
137K
84.
IS41C44052-50JI5V 4M x 4(16-MBIT) dynamic RAM with fast page mode
ISSI
SOJ
24
-40°C
85°C
137K
85.
IS41LV44002-50J3.3V 4M x 4(16-MBIT) dynamic RAM with edo page mode
ISSI
SOJ
24
0°C
70°C
157K
86.
IS41LV44002-50JI3.3V 4M x 4(16-MBIT) dynamic RAM with edo page mode
ISSI
SOJ
24
-40°C
85°C
157K
87.
IS41LV44052-50J3.3V 4M x 4(16-MBIT) dynamic RAM with fast page mode
ISSI
SOJ
24
0°C
70°C
137K
88.
IS41LV44052-50JI3.3V 4M x 4(16-MBIT) dynamic RAM with fast page mode
ISSI
SOJ
24
-40°C
85°C
137K
89.
IS61LV6432-5PQ64K x 32 synchronous pipeline static RAM
ISSI
PQFP
100
0°C
70°C
174K
90.
IS61LV6432-5PQI64K x 32 synchronous pipeline static RAM
ISSI
PQFP
100
-40°C
85°C
174K
91.
IS61LV6432-5TQ64K x 32 synchronous pipeline static RAM
ISSI
TQFP
100
0°C
70°C
174K
92.
IS61LV6432-5TQI64K x 32 synchronous pipeline static RAM
ISSI
TQFP
100
-40°C
85°C
174K
93.
IS61NLP12832-5B128K x 32 pipeline no wait state bus sram
ISSI
PBGA
119
0°C
70°C
154K
94.
IS61NLP12832-5TQ128K x 32 pipeline no wait state bus sram
ISSI
TQFP
100
0°C
70°C
154K
95.
IS61NP12832-5B128K x 32 pipeline no wait state bus sram
ISSI
PBGA
119
0°C
70°C
154K
96.
IS61NP12832-5TQ128K x 32 pipeline no wait state bus sram
ISSI
TQFP
100
0°C
70°C
154K
97.
M5-320/192-5AC5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
LATIC
BGA
256
0°C
70°C
1M
98.
M5-384/192-5AC5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
LATIC
BGA
256
0°C
70°C
1M
99.
M5-512/192-5AC5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
LATIC
BGA
256
0°C
70°C
1M
100.
PI6C39912-5J3.3V high speed LVTTL or balanced output programmable skew clock buffer
PERIC
PLCC
32
0°C
70°C
492K
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