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GetDatasheet is a free electronic engineering tool that enables you to locate product datasheets from hundreds of electronic component manufacturers worldwide.

Found: 704      Displaying: 641 - 660
#
Part:
Description:
Manuf.
Package
Pins
T°min
T°max
PDF size
641.
ACM4004E-NLBH-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
642.
ACM4004E-NLBH-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
643.
ACM4004E-NLBW-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
644.
ACM4004E-NLYH-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
645.
ACM4004E-NLYW-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
646.
ACM4004E-NLYW-T2.7-5.5V; 40characters x 4lines; dot size:0.50x0.55mm; character pitch:2.78x4.89mm; liquid crystal display
AZDIS
-
-
-20°C
70°C
322K
647.
QL3004E-0PL68C4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
0°C
70°C
193K
648.
QL3004E-0PL68I4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-40°C
85°C
193K
649.
QL3004E-0PL68M4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-55°C
125°C
193K
650.
QL3004E-1PL68C4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
0°C
70°C
193K
651.
QL3004E-1PL68I4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-40°C
85°C
193K
652.
QL3004E-1PL68M4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-55°C
125°C
193K
653.
QL3004E-2PL68C4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
0°C
70°C
193K
654.
QL3004E-2PL68I4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-40°C
85°C
193K
655.
QL3004E-2PL68M4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-55°C
125°C
193K
656.
QL3004E-3PL68C4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
0°C
70°C
193K
657.
QL3004E-3PL68I4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-40°C
85°C
193K
658.
QL3004E-3PL68M4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-55°C
125°C
193K
659.
QL3004E-4PL68C4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
0°C
70°C
193K
660.
QL3004E-4PL68I4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-40°C
85°C
193K
661.
QL3004E-4PL68M4,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
QULOG
PLCC
68
-55°C
125°C
193K
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