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| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
| 1. | APR3012-15AI-TR | 1.5 V, micropower microprocessor reset circuit | ANPEC | SOT-23 | 3 | -40°C | 85°C | 123K |
| 2. | APR3012-15BC-TR | 1.5 V, micropower microprocessor reset circuit | ANPEC | SOT-23-5 | 5 | 0°C | 70°C | 123K |
| 3. | APR3012-15BI-TR | 1.5 V, micropower microprocessor reset circuit | ANPEC | SOT-23-5 | 5 | -40°C | 85°C | 123K |
| 4. | APR3012-17AI-TR | 1.75 V, micropower microprocessor reset circuit | ANPEC | SOT-23 | 3 | -40°C | 85°C | 123K |
| 5. | APR3012-17BC-TR | 1.75 V, micropower microprocessor reset circuit | ANPEC | SOT-23-5 | 5 | 0°C | 70°C | 123K |
| 6. | APR3012-17BI-TR | 1.75 V, micropower microprocessor reset circuit | ANPEC | SOT-23-5 | 5 | -40°C | 85°C | 123K |
| 7. | LC11012-141 | Computer image signal processing full-color grayscale processor | SANYO | QFP64E | 64 | 0°C | 70°C | 171K |
| 8. | MIC2012-1CQS | USB Power Controller | MICRL | QSOP | 16 | - | - | 56K |
| 9. | MIC2012-1PCQS | USB Power Controller | MICRL | QSOP | 16 | - | - | 56K |
| 10. | QL3012-1PF100C | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 100 | 0°C | 70°C | 347K |
| 11. | QL3012-1PF100I | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 100 | -40°C | 85°C | 347K |
| 12. | QL3012-1PF100M | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 100 | -55°C | 125°C | 347K |
| 13. | QL3012-1PF144C | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 144 | 0°C | 70°C | 347K |
| 14. | QL3012-1PF144I | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 144 | -40°C | 85°C | 347K |
| 15. | QL3012-1PF144M | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | TQFP | 144 | -55°C | 125°C | 347K |
| 16. | QL3012-1PL84C | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | PLCC | 84 | 0°C | 70°C | 347K |
| 17. | QL3012-1PL84I | 12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density. | QULOG | PLCC | 84 | -40°C | 85°C | 347K |
| 18. | QL3012-1PL84M | 12,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | QULOG | PLCC | 84 | -55°C | 125°C | 239K |
| 19. | UPD17071GB-012-1A7 | Portable DTS controller 17K series | NEC | 56-P-QFP | - | - | - | 296K |
| 20. | WPA50R48S012-1 | 50W single output eighth brick DC/DC converter. Nom.input voltage 48Vdc, rated output voltage 1.2Vdc. Output current: 0.0A(min load), 18A(rated load). | CANDD | - | 8 | - | - | 156K |
