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LS10 datasheet



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Found: 192      Displaying: 1 - 20
#
Part:
Description:
Manuf.
Package
Pins
T°min
T°max
PDF size
1.
JD54LS109BFADual Positive Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs
NSC
Cerpack
16
-
-
135K
2.
JD54LS10B2ATriple 3-Input NAND Gate
NSC
LCC
20
-
-
120K
3.
N74ALS10ADTriple 3-Input NAND gate
PHLPS
SOT108
-
-
-
86K
4.
N74ALS10ANTriple 3-Input NAND gate
PHLPS
SOT27
-
-
-
86K
5.
PLS100AProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
SOT261
-
-
-
127K
6.
PLS100FProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
FQ
-
-
-
127K
7.
PLS100FBProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
FQ
-
-
-
127K
8.
PLS100NProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
SOT117
-
-
-
127K
9.
PLS101AProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
SOT261
-
-
-
127K
10.
PLS101FProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
FQ
-
-
-
127K
11.
PLS101NProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
SOT117
-
-
-
127K
12.
PLS101NBProgrammable logic arrays (16 ? 48 ? 8)
PHLPS
SOT117
-
-
-
127K
13.
SN54ALS109AJ DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
TI
J
16
-55°C
125°C
113K
14.
SN54LS109AJ DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
J
16
-55°C
125°C
271K
15.
SNJ54ALS109AFK DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
TI
FK
20
-55°C
125°C
113K
16.
SNJ54ALS109AJ DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
TI
J
16
-55°C
125°C
113K
17.
SNJ54LS109AFK DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
FK
20
-55°C
125°C
271K
18.
SNJ54LS109AFK DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
FK
20
-55°C
125°C
271K
19.
SNJ54LS109AJ DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
J
16
-55°C
125°C
271K
20.
SNJ54LS109AJ DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
J
16
-55°C
125°C
271K
21.
SNJ54LS109AJ DUAL J-K(/) POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
TI
J
16
-55°C
125°C
271K
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