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210-2 datasheet
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Found: 14 Displaying: 1 - 14| # | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size | | 1. | 27C210-20A | 0.6-7 V, 1 MEG CMOS EPROM (64Kx16) | PHLPS | PLCC | 44 | 0°C | 70°C | 528K | | 2. | 27C210-20A | 0.6-7 V, 1 MEG CMOS EPROM (64Kx16) | PHLPS | PLCC | 44 | 0°C | 70°C | 528K | | 3. | 27C210-20FA | 0.6-7 V, 1 MEG CMOS EPROM (64Kx16) | PHLPS | CDIL | 40 | 0°C | 70°C | 528K | | 4. | 27C210-20N | 0.6-7 V, 1 MEG CMOS EPROM (64Kx16) | PHLPS | PDIL | 40 | 0°C | 70°C | 528K | | 5. | AA210-25 | GaAs IC 4 bit digital attenuator 1 dB LSB DC-2 GHz | ALPHA | SOIC | 16 | -40°C | 85°C | 38K | | 6. | LTC4210-2CS6 | Hot swap controller | LINER | TSOT-23 | 6 | 0°C | 70°C | 246K | | 7. | LTC4210-2IS6 | Hot swap controller | LINER | TSOT-23 | 6 | -40°C | 85°C | 246K | | 8. | MACH210-20JC | High-density EE CMOS programmable logic, 20ns | AMD | PLCC | 44 | 0°C | 70°C | 301K | | 9. | MACH210-20JC | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 20ns | LATIC | PLCC | 44 | 0°C | 70°C | 347K | | 10. | MACH210-24JI | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 24ns | LATIC | PLCC | 44 | -40°C | 85°C | 347K | | 11. | MACHLV210-20JC | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 20ns | LATIC | PLCC | 44 | 0°C | 70°C | 221K | | 12. | MACHLV210-24JI | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 24ns | LATIC | PLCC | 44 | -40°C | 85°C | 221K | | 13. | PE4210-21 | SPDT low insertion loss MOSFET RF switch | PEREG | SOP | 8 | -40°C | 85°C | 285K | | 14. | PE4210-22 | SPDT low insertion loss MOSFET RF switch | PEREG | SOP | 8 | -40°C | 85°C | 285K |
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